Portable AnaLyticS (PALS)*
Abstract
*Formerly Scalable Optical Nodes for Networked Edge Traversal (SONNET) Graph analytics on large data sets is currently performed on leadership-class supercomputers that are designed for other purposes. These machines are required because they have the memory capacity required for large graph problems, but the ability to efficiently move data to and effectively utilize compute resources is limited, resulting in extremely low compute efficiency. Computationally, graph analysis is characterized by many short, random accesses to memory which is inefficient on current systems that are optimized for regular, predictable access. The movement of data between memory and processors now requires more time and energy than the logical operations themselves. This is the result of generations of systems that architecturally separate computing/data manipulation and main data storage. Large systems have shown utilization (percentage of system peak throughput capability used) drop from as high as 90% to in the order of 2% due to the data patterns for different applications. To resolve this problem, the PALS program will develop technologies, architectures, and software approaches that move critical data processing kernels and critical data organization operations adjacent to the memory itself, rather than at physically distant general computing nodes, addressing data latency, overall computational performance and power for critical data intensive elements of an application. The PALS approach is not to physically or functionally move processing entirely to the memory, but rather to move specific, critical data intensive components of an application to the data. The result will dramatically improve performance for data intensive applications, by off-loading the main processor of data-intensive operations, and enabling data security operations at the memory itself. This will be accomplished by utilizing industry advances in 3D packaging, particularly the bandwidth, latency and power advances being developed in 3D memory stacks; new software approaches for data management; investigating alternative data movement technologies such as co-designing processor and photonic hardware, exploiting the high bandwidth provided by silicon photonics. It will also include incorporation of domain specific logic for unique and asymmetric data-intensive DoD functional capabilities at all appropriate levels of a processing system's memory. The performance and efficiency will be transformational for data analytics for both big data and embedded data-intensive DoD applications and enable real-time analysis on dynamic graphs in the fields of cyber security, threat detection, and numerous others.
Document Details
- Document Type
- Accomplishment
- Publication Date
- Oct 01, 2017
- Source ID
- 003c5a6348dfed47a4d48563460f3a98