Programmable Logic for Applications In Defense (PLAID)*
Abstract
*Previously part of Beyond Scaling - Access The Programmable Logic for Applications In Defense (PLAID) program is developing a heterogeneous compute platform that can support processing of large data arrays. Current computing architectures are subject to scaling, bandwidth, and memory limitations and the large size of today's chips limits the movement of data resulting in a fundamental trade-off between circuit size and data throughput. The PLAID program will break this paradigm with new architecture development and achieve more than a 10X bandwidth increase on-chip. In addition to the development of this new device, the PLAID program will expedite deployment into DoD systems by engaging the defense industrial base to map DoD-relevant radio frequency (RF) processing problems onto the new architecture. These RF problems may include element-level digital beamforming, multi-target tracking radar applications and synthetic aperture radar processing. Once applications are mapped onto the new processor, the implementation will be programmed and tested with the intent that the use of the new device developed by commercial industry will directly transition into an asymmetric advantage for the DoD and used by the defense industrial base in emerging applications.
Document Details
- Document Type
- Accomplishment
- Publication Date
- Oct 01, 2022
- Source ID
- 0262d01af9cc6023aff2b463c143579b