IUSS Detect/Classif System
Abstract
A. This project includes efforts for SURTASS. The SURTASS project comprises the mobile, tactical arm of the Integrated Undersea Surveillance System, providing long range detection and cueing for tactical weapons platforms against both diesel and nuclear powered submarines. SURTASS also provides the undersea surveillance necessary to support regional conflicts and sea-lane protection. SURTASS has experienced recent passive and active success against diesel submarines operating in shallow water. SURTASS is leveraging existing developments and reducing costs by using Non-Developmental Items and commercial hardware, supporting common Navy Undersea Warfare processing and towed array developments, and increasing operator efficiency through computer-aided detection and classification processing. SURTASS development efforts include LFA improvements, common IUSS processing, twin-line array development and processing, improved detection and classification/passive automation to counter quieter threats, additional signal processing, integrated active and passive operations, improved Battle Group support, and improved information processing. LFA provides an active adjunct capability for IUSS passive and tactical sensors to counter the quieter diesel and nuclear threats of the 1990s and beyond. The LFA tasks are directed at detection of slow, quiet threats in harsh littoral waters. Improvements include TL-29A/LFA integration enhancements, advanced waveforms for littoral/shallow water operations including Doppler sensitive waveforms, and processing algorithms to reduce clutter and reverberation false alarms in shallow water. The LFA task includes development and testing of a compact LFA transmit source array for SWATH-P ships, and upgrade of LFA processing capability in the IUSS Integrated Common Processing (ICP) architecture. The ICP is a derivative of the NAVSEA Submarine Acoustic Rapid COTS Insertion (ARCI) program, and is being augmented for IUSS requirements. Together, the LFA improvements, TL-29A, and the ICP support the SURTASS Active Improvement Program. Functional improvements are delivered to the Fleet in software "builds" while hardware improvements are delivered through the Tech Insertion (TI) process. Software improvements delivered via the Advanced Surveillance Build (ASB) process are based on the Advanced Processor Build (APB) process begun by the NAVSEA Submarine USW program. Each ASB will introduce new capabilities into SURTASS systems including improved automation, normalizer techniques, adaptive beam forming, and display enhancements. SURTASS participates in the process by contributing algorithms for consideration, supplying peer group members for review of candidate algorithms, participating in test evolutions, and incorporating improved algorithms into operational systems. The TI process, modeled after the NAVSEA Submarine USW hardware improvement program, delivers processing technology improvements to platforms on roughly a 4-year cycle. Hardware upgrades for active and passive arrays and communications systems will also be provided during TI upgrades, but not on a regular planned development cycle as for the processing upgrades. B. PEO SUB is involved with the development and maintenance of various IUSS systems. These systems include FDS, FDS-C, and SURTASS. The near-term goal is development of ICP, which will result in a single IUSS processor baseline, with minor maintenance efforts continuing on fielded systems. The existing system architecture, signal processing, contact management, and reporting requirements will be evaluated as well as the requirements for future systems. The development of the ICP will take advantage of automation advancement, array technology improvements, along with IUSS, submarine, and surface USW system commonality. Additionally, a long term goal is to activate all IUSS sensors as part of a coordinated Active Improvement Program. The FSS portion of 0766 is classified with details available at a higher classification level.
Document Details
- Document Type
- Project
- Publication Date
- Oct 01, 2016
- Source ID
- 0766._0204311N_7_1319_PB_2016
Related Documents
- Root: Integrated Surveillance System
- Child Accomplishment: Integrated Common Processor (ICP)
- Child Accomplishment: Compact Low Frequency Active
- Child Accomplishment: TB-29A/Twin-Line
- Child Accomplishment: Classified Effort
- Child Cost Item: 08853cd593d4c48acd29f2b48b5ffbc1
- Child Cost Item: b28ce4702180daa038af969eb73be006
- Child Cost Item: 72860b2d8ec3bd20c43efe86dc8a31d3
- Child Cost Item: 78382a827623e201fe1c3db5e2697218
- Child Cost Item: 441dcd8815b1fa3d91b8809f39cc905f
- Child Cost Item: c4bc795df5bdcd9ad6ccbd641161acbe
- Child Cost Item: 4983582278349c434f896dd8204ff7bd
- Child Cost Item: b0d71d8cf8c2fb19b4bcaac87a2c1aea
- Child Cost Item: fd30fc42423b10a975008bc592a8e5ec
- Child Cost Item: 8d08e091598d7da62bf34ba50b27e14f
- Child Cost Item: 4cc2bb6729565410ec4402d67566124f
- Child Cost Item: 7dea7a195bcf62ecc620c45b26ecfce1
- Child Cost Item: 90a20366399b8df84397b427d534cd7b
- Child Cost Item: 8d69973e8a166257ff0abbf7619196c1
- Child Cost Item: faa5262280c98df3a6e9ff765bb20f5c
- Child Cost Item: c27347ba4687431fd493a364deecb1ed
- Child Cost Item: d3267688e7073a5d55ae29b6288a93ce
- Child Cost Item: 60c0d1a32b928cfe625c97c7f4fed72d
- Child Cost Item: 2c078cd69f6450dcef30dad676e5d057
- Child Cost Item: 0d1287646618a266289b1f916161c540
- Child Cost Item: d31ec8802f0b4b081b43ab216b83d1f6
- Child Cost Item: 7c7602de08f5202820fcf816cdf84ccd
- Child Cost Item: 4862d0d4d3781b2fd84683243059863a
- Child Cost Item: 0e9596a45160d8266c95bfffcd6f595d
- Child Cost Item: 764120cc0cde2191445f1e8a7a6797a9
- Child Cost Item: 74560ffebf975ee1db4fe21f6ceaece4
- Child Cost Item: 6d5fc2c2d834eb4ec745c6f19c0a8396
- Child Cost Item: f38f9d69b7741aecdb48cf8adca9c94d