Schottky Junction Vertical Channel GaN Static Induction Transistor with a Sub‐Micrometer Fin Width
Abstract
GaN‐based vertical transistors have demonstrated its excellent properties for high‐power and high‐frequency electronic devices. This work introduces a GaN‐based static induction transistor (SIT) which is another form of vertical GaN transistors without requiring any p‐type GaN and gate dielectrics for its operation. Processing strategy to generate the GaN SIT with a sub‐micrometer fin width involves photoresist (PR)‐assisted planarization with an understanding of dry etch parameters for the planar PR surface. The efficacy of this process is demonstrated by the device's triode‐like output characteristics with high current density (0.65 kA cm−2) and low ON resistance (1.48 mΩ cm2) at 1 V of drain voltage. In addition, the electrical properties such as current density and modulation are examined depending on the fin width of GaN SIT. The result reveals that the size reduction in the GaN SIT utilizing the sub‐micrometer fin as a channel could increase the current modulation, but it could decrease the current density because of the raised potential minima due to the depletion region overlap. It is believed that the GaN SIT demonstrating high blocking voltage and low ON resistance would present a very promising class of transistor for next‐generation high‐power and high‐frequency electronics.
Document Details
- Document Type
- Pub Defense Publication
- Publication Date
- Dec 04, 2018
- Source ID
- 10.1002/aelm.201800689
Entities
People
- Anchal Agarwal
- Jaeyi Chun
- Srabanti Chowdhury
- Wenwen Li
Organizations
- Office of Naval Research
- United States Department of Energy
- University of California
- University of California, Santa Barbara