Low‐Conductance and Multilevel CMOS‐Integrated Nanoscale Oxide Memristors
Abstract
Using memristors, such as oxide and phase change resistive switches, as tunable resistors to construct analog computing hardware accelerators is gaining keen attention. Such accelerators have demonstrated the potential to significantly outperform digital computers in highly relevant applications such as machine learning and image processing. However, improvements in device‐level performance of memristors, including reducing power consumption and high current–induced metal migration in interconnects, need continued developments. Nanoscaling and complementary metal‐oxide semiconductor (CMOS) integration are also of significant importance in commercialization of such accelerators. Here tantalum oxide memristors scaled down to 25 nm sizes and integrated on CMOS transistor circuits are presented. The memristor conductance is programmable with a 6 order‐of‐magnitude operating range, especially with 3‐bits below 10 µS for low current operation. The stability of such levels and the size scaling of the operating parameters are further studied. These results will aid device engineering of memristors and bolster development of neuromorphic hardware accelerators.
Document Details
- Document Type
- Pub Defense Publication
- Publication Date
- May 02, 2019
- Source ID
- 10.1002/aelm.201800876
Entities
People
- Brent Buchanan
- Can Li
- Catherine E. Graves
- John Paul Strachan
- Le Zheng
- Sity Lam
- Suhas Kumar
- Xia Sheng
- Xuema Li
Organizations
- Hp
- Intelligence Advanced Research Projects Activity