Scaling of pneumatic digital logic circuits
Abstract
We present strategies for scaling pneumatic logic circuits to smaller dimensions. Our process achieves order-of-magnitude increases in both circuit density and speed, enabling the construction of a 12-bit counter.
Document Details
- Document Type
- Pub Defense Publication
- Publication Date
- Jan 01, 2015
- Source ID
- 10.1039/c4lc01048e
Entities
People
- Elliot E Hui
- Philip N. Duncan
- Siavash Ahrar
Organizations
- Defense Advanced Research Projects Agency
- Division of Electrical, Communications & Cyber Systems
- United States Army
- University of California
- University of California, Irvine