Interference and memory capacity effects in memristive systems

Abstract

Short-term memory implies the existence of a capacity limit beyond which memory cannot be securely formed and retained. The underlying mechanisms are believed to be two primary factors: decay and interference. Here, we demonstrate through both simulation and experiment that the memory capacity effect can be implemented in a parallel memristor circuit, where decay and interference are achieved by the inherent ion diffusion in the device and the competition for current supply in the circuit, respectively. This study suggests it is possible to emulate high-level biological behaviors with memristor circuits and will stimulate continued studies on memristor-based neuromorphic circuits.

Document Details

Document Type
Pub Defense Publication
Publication Date
Feb 25, 2013
Source ID
10.1063/1.4794024

Entities

People

  • Chao Du
  • John Hermiz
  • Ting Chang
  • Wei Lu

Organizations

  • Defense Advanced Research Projects Agency
  • University of Michigan

Tags

Readers

  • Integrated Circuit Design and Technology.
  • Systems Analysis and Design
  • Theoretical Analysis.