First demonstration of robust tri-gate β-Ga2O3 nano-membrane field-effect transistors
Abstract
Nano-membrane tri-gate β-gallium oxide (β-Ga2O3) field-effect transistors (FETs) on SiO2/Si substrate fabricated via exfoliation have been demonstrated for the first time. By employing electron beam lithography, the minimum-sized features can be defined with the footprint channel width of 50 nm. For high-quality interface between β-Ga2O3 and gate dielectric, atomic layer-deposited 15 nm thick aluminum oxide (Al2O3) was utilized with tri-methyl-aluminum (TMA) self-cleaning surface treatment. The fabricated devices demonstrate extremely low subthreshold slope (SS) of 61 mV dec−1, high drain current (I DS) ON/OFF ratio of 1.5 × 109, and negligible transfer characteristic hysteresis. We also experimentally demonstrated robustness of these devices with current–voltage (I–V) characteristics measured at temperatures up to 400 °C.
Document Details
- Document Type
- Pub Defense Publication
- Publication Date
- Dec 24, 2021
- Source ID
- 10.1088/1361-6528/ac3f11
Entities
People
- Hagyoul Bae
- Jinhyun Noh
- Mengwei Si
- Peide Ye
- Shriram Ramanathan
- Tae Joon Park
- Wonil Chung
Organizations
- Defense Advanced Research Projects Agency
- Office of Naval Research
- United States Department of Energy