A 28 nm 2 Mbit 6 T SRAM With Highly Configurable Low-Voltage Write-Ability Assist Implementation and Capacitor-Based Sense-Amplifier Input Offset Compensation

Document Details

Document Type
Pub Defense Publication
Publication Date
Feb 01, 2016
Source ID
10.1109/jssc.2015.2498302

Entities

People

  • Andreas J. Gotterba
  • Bill Dally
  • Brian Zimmer
  • C. Thomas Gray
  • Jason Golbus
  • Jesse Wang
  • John W. Poulton
  • Mahmut E. Sinangil
  • Matthew R. Fojtik
  • Stephen G. Tell
  • Thomas H. Greer

Organizations

  • Defense Advanced Research Projects Agency