An Energy-Efficient Graphics Processor in 14-nm Tri-Gate CMOS Featuring Integrated Voltage Regulators for Fine-Grain DVFS, Retentive Sleep, and ${V}_{\text{MIN}}$ Optimization

Document Details

Document Type
Pub Defense Publication
Publication Date
Jan 01, 2019
Source ID
10.1109/jssc.2018.2875097

Entities

People

  • Andres Malavasi
  • Ashwin Mendon
  • Bala Iyer
  • Brando Perez Esparza
  • Carlos Tokunaga
  • Charles Augustine
  • Chung-ching Peng
  • D. Mathaikutty
  • G. Chinya
  • George E. Matthew
  • Hao Wang
  • James Tschanz
  • Jaydeep Kulkarni
  • Joseph Ryan
  • Krishnan Ravichandran
  • L. Cuellar
  • M. Woodman
  • Minki Cho
  • Muhammad M. Khellah
  • Pascal Meinerzhagen
  • Rinkle Jain
  • Somnath Paul
  • Sriram Vangal
  • Stephen T. Kim
  • Subramaniam Maiyuran
  • Vaibhav Vaidya
  • Vivek De
  • Xiang Zou
  • Yuyun Liao

Organizations

  • Defense Advanced Research Projects Agency