Power-Aware SE Analysis of Different FF Designs at the 14-/16-nm Bulk FinFET CMOS Technology Node

Document Details

Document Type
Pub Defense Publication
Publication Date
Aug 01, 2018
Source ID
10.1109/tns.2018.2831002

Entities

People

  • Bharat Bhuva
  • H. Jiang
  • H. Zhang
  • Indranil Chatterjee
  • J. S. Kauppila
  • L. W. Massengill

Organizations

  • Defense Threat Reduction Agency