MoS 2 transistors with 1-nanometer gate lengths
Abstract
High-performance silicon transistors can have gate lengths as short as 5 nm before source-drain tunneling and loss of electrostatic control lead to unacceptable leakage current when the device is off. Desai et al. explored the use of MoS 2 as a channel material, given that its electronic properties as thin layers should limit such leakage. A transistor with a 1-nm physical gate was constructed with a MoS 2 bilayer channel and a single-walled carbon nanotube gate electrode. Excellent switching characteristics and an on-off state current ratio of ∼10 6 were observed.
Document Details
- Document Type
- Pub Defense Publication
- Publication Date
- Oct 07, 2016
- Source ID
- 10.1126/science.aah4698
Entities
People
- Ali Javey
- Angada B. Sachid
- Chenming Hu
- Geun Ho Ahn
- Gregory Pitner
- H-S Philip Wong
- Jeffrey Bokor
- Juan Pablo Llinas
- Moon J. Kim
- Qingxiao Wang
- Sujay B. Desai
- Surabhi R. Madhvapathy
Organizations
- Applied Materials
- Entegris
- Lawrence Berkeley National Laboratory
- Office of Naval Research
- Stanford University
- United States Department of Energy
- University of Texas at Dallas