Flexible auto-refresh
Abstract
DRAM cells require periodic refreshing to preserve data. In JEDEC DDRx devices, a refresh operation is performed via an auto-refresh command, which refreshes multiple rows in multiple banks simultaneously. The internal implementation of auto-refresh is completely opaque outside the DRAM --- all the memory controller can do is to instruct the DRAM to refresh itself --- the DRAM handles all else, in particular determining which rows in which banks are to be refreshed. This is in conflict with a large body of research on reducing the refresh overhead, in which the memory controller needs fine-grained control over which regions of the memory are refreshed. For example, prior works exploit the fact that a subset of DRAM rows can be refreshed at a slower rate than other rows due to access rate or retention period variations. However, such row-granularity approaches cannot use the standard auto-refresh command, which refreshes an entire batch of rows at once and does not permit skipping of rows. Consequently, prior schemes are forced to use explicit sequences of activate (ACT) and precharge (PRE) operations to mimic row-level refreshing. The drawback is that, compared to using JEDEC's auto-refresh mechanism, using explicit ACT and PRE commands is inefficient, both in terms of performance and power.
Document Details
- Document Type
- Pub Defense Publication
- Publication Date
- Jun 13, 2015
- Source ID
- 10.1145/2872887.2750408
Entities
People
- Bruce Jacob
- Ishwar Bhati
- Shih-lien Lu
- Zeshan Chishti
Organizations
- Intel Corporation
- Oracle
- Sandia National Laboratories
- United States Department of Defense
- United States Department of Energy
- University of Maryland