Spatial: a language and compiler for application accelerators
Abstract
Industry is increasingly turning to reconfigurable architectures like FPGAs and CGRAs for improved performance and energy efficiency. Unfortunately, adoption of these architectures has been limited by their programming models. HDLs lack abstractions for productivity and are difficult to target from higher level languages. HLS tools are more productive, but offer an ad-hoc mix of software and hardware abstractions which make performance optimizations difficult.
Document Details
- Document Type
- Pub Defense Publication
- Publication Date
- Jun 11, 2018
- Source ID
- 10.1145/3296979.3192379
Entities
People
- Ardavan Pedram
- Christos Kozyrakis
- David Koeplinger
- Kunle Olukotun
- Luigi Nardi
- Matthew Feldman
- Raghu Prabhakar
- Ruben Fiszel
- Stefan Hadjis
- Tian Zhao
- Yaqi Zhang
Organizations
- Defense Advanced Research Projects Agency
- National Science Foundation
- Stanford University
- Swiss Federal Institute of Technology in Lausanne