Photonic topology optimization with semiconductor-foundry design-rule constraints

Abstract

We present a unified density-based topology-optimization framework that yields integrated photonic designs optimized for manufacturing constraints including all those of commercial semiconductor foundries. We introduce a new method to impose minimum-area and minimum-enclosed-area constraints, and simultaneously adapt previous techniques for minimum linewidth, linespacing, and curvature, all of which are implemented without any additional re-parameterizations. Furthermore, we show how differentiable morphological transforms can be used to produce devices that are robust to over/under-etching while also satisfying manufacturing constraints. We demonstrate our methodology by designing three broadband silicon-photonics devices for nine different foundry-constraint combinations.

Document Details

Document Type
Pub Defense Publication
Publication Date
Jul 13, 2021
Source ID
10.1364/oe.431188

Entities

People

  • Alec M. Hammond
  • Ardavan Oskooi
  • Stephen E. Ralph
  • Steven G. Johnson

Organizations

  • Army Research Office
  • Georgia Tech
  • Massachusetts Institute of Technology

Tags

Readers

  • Graph Algorithms and Convex Optimization.
  • Integrated Circuit Design and Technology.
  • Systems Analysis and Design

Technology Areas

  • Microelectronics