Scalable Optical Nodes for Networked Edge Traversal (SONNET)
Abstract
Graph analytics on large data sets is currently performed on leadership-class supercomputers that are designed for other purposes. These machines are required because they have the memory capacity required for large graph problems, but the demand on the processors is low, resulting in extremely low compute efficiency. Computationally, graph analysis is characterized by many short, random accesses to memory which is inefficient on current systems, which are optimized for regular predictable access. The SONNET program will build a silicon photonics-based graph processor that will perform graph analysis on terabytes (TBs) of data with performance comparable to peta-scale supercomputers in a significantly smaller size, weight and power (SWaP) envelope. SONNET will optimize the design of the graph processor by co-designing processor and photonic hardware, and the computer and network architectures to exploit the high bandwidth provided by silicon photonics. SONNET will demonstrate a scalable, power efficient prototype of such a graph processor and quantify performance for DoD-relevant applications. The performance, efficiency, and size will be transformational for big data analytics and enable real-time analysis on dynamic graphs in the fields of cyber security, threat detection, and numerous others. This program will explore the efficient processing of local information using stacked memory and integrated circuits specially made for specific tasks, as well as the efficient transfer of data between local information processors. The SONNET program will optimize silicon photonic links and improve their power efficiency while also developing packaging techniques for high bandwidth silicon photonic transceivers. SONNET will integrate high capacity memory cards with photonic transceivers to enable high bandwidth access to high capacity memory. The program will build a four node prototype system with a silicon photonic switch connecting the nodes. The program will demonstrate the scalability of the prototype to petascale computational capability. This will also explore the use of processing very close to a stacked memory to investigate the benefits of local processing within the islands connected by the photonic links. This program has applied research efforts funded in PE 0602303E, Project IT-02. Technologies developed under this program will transition to the Services.
Document Details
- Document Type
- Accomplishment
- Publication Date
- Oct 01, 2016
- Source ID
- 2ffd7a31bce32036d7fffa74747de548