Complexity Management Hardware
Abstract
The battlefield of the future will have more data generators and sensors to provide information required for successful combat operations. With networked sensors, the variety and complexity of the information streams will be even further extended. The Complexity Management Hardware program will develop silicon designs which help alleviate the complexity inherent in next generation systems. These systems will have increasingly large data sets generated by their own multidomain sensors (such as RF and Electro-Optical/Infrared (EO/IR) payloads) as well as potentially new inputs from external sensors. With current programming approaches, there are laborious coding requirements needed to accommodate new data streams. Additionally, the context provided by these data sets is ever changing, and it is imperative for the integrated electronics to adapt to new information without a prolonged programming cycle. Providing contextual cues for processing data streams will alleviate the fusion challenges that are currently faced, and which stress networked battlefield systems. As opposed to the intuition and future-proofing that is required at the programming stage of a current system, the silicon circuit of the future will be able to use contextual cues to adapt accordingly to new information as it is provided. The applied research aspects of this program will investigate circuit design which can exploit the algorithms showing benefit for complexity management. This will entail various sparse versus dense data manipulations with hardware implementations catered to both types of data. The program will show hardware implementations that gracefully handle multiple data streams and limit the programming burden for a complex scenario. Basic research efforts are funded in PE 0601101E, Project CCS-02.
Document Details
- Document Type
- Accomplishment
- Publication Date
- Oct 01, 2017
- Source ID
- 3df534111697169f6575cd44960cca9a