C-5 Block Upgrade

Abstract

C-5 Block Upgrade: Purpose of this program is to provide a measured approach to implement a common baseline for the C-5 fleet in order to allow insertion and integration of new/future capabilities and replacement of future unsupportable equipment. Software (S/W) and hardware (H/W) baselines between the avionics modernization program (AMP) and reliability enhancement and re-engining program (RERP) have diverged. S/W deficiencies corrected under AMP sustainment (block cycle changes) reappear in RERP. The AMP system has a total of two core processor module (CPM) cards; the RERP system has a total of three CPM cards. Originally, AMP was to have 50% spare processing and memory capability; currently, AMP CPMs have only 5% throughput capability remaining, which create safety concerns. AMP throughput/capacity constraint does not allow room for any new/future capability and contributes to current computer problems. Failure to upgrade the AMP core processing platform to the three CPM RERP configuration will affect mission capable rates, will inhibit the ability to fix current deficiency reports (DRs) and drive increased sustainment costs associated with S/W and H/W baseline divergence. The C-5 AMP core processing platform development will complete in FY12. This program is in Budget Activity 7, Operational System Development because this budget activity includes development efforts to upgrade systems that have been fielded or have received approval for full rate production and anticipate production funding in the current or subsequent fiscal year.

Document Details

• Document Type: Project
• Publication Date: Oct 01, 2013
• Source ID: 675353_0401119F_7_3600_PB_2013

Tags

Readers

• Aerospace Engineering
• Computer Science.