System-On-Chip (SOC)

Abstract

Enables smaller, less costly Global Positioning Systems (GPS) by developing the manufacturing technologies to enable reduced weight, size and power consumption to provide leap-ahead communication and sensor capability by maturing technologies that move heavy, high volume/power demand systems to small, power efficient System-On-Chip (SOC) packaging technology. Small form factor GPS components will be available to designers for incorporation into a wide variety of weapons systems. Program Outputs: Moves the basic packaging technology from a manufacturing proof-of-concept to qualification for application in the Ground-Based GPS Receiver Application Module (GB-GRAM) as the initial adopter. DWM S&T investments will refine the fabrication process, develop design rules for complex integration of non-optimized electronic devices into very high density packages, and accelerate the development and integration of the receiver module that can be used for downstream system application. The combination of bare die, high density silicon interposers, 3-dimensional die stacking, advanced RF quality laminates, and the use of micro-passive surface mount devices will be used to achieve a 62% volume reduction over the present GB-GRAM circuit card assembly.

Document Details

Document Type
Accomplishment
Publication Date
Oct 01, 2012
Source ID
6eceab4128a9a6d1cfba1e6d83181824

Tags

Fields of Study

  • Computer science

Readers

  • Electrical Engineering
  • Military Science and Technology Research and Modernization.
  • Positioning, Navigation, and Timing (PNT) Technology.

Technology Areas

  • Microelectronics
  • Microelectronics - Microelectromechanical Systems
  • Space

Related Documents