Access to Advanced Packaging and Testing - Demonstration
Abstract
This project will deliver an on-shore SHIP assembly and test capability. It will demonstrate access to, personalization of, and customization for supporting the DoD programs. It will enable a revolutionary leap in system performance that will greatly reduce size, weight and power (SWaP) by incorporating the immense advances in SOTA commercial off the shelf (COTS) processing technologies, such as field programmable gate arrays (FPGAs), microprocessors, and Graphic Processing Units (GPUs). Leading-edge semiconductor design and manufacturing technology forms the basis for many of the DoD modernization priorities. Most dual-use COTS parts used for modernization priorities are currently manufactured in Asian facilities that do not provide measurable assurance. This program enhancement demonstrates the DoD access to leading-edge semiconductor technology through domestic U.S.-located sources of custom and dual-use leading edge integrated circuits utilizing heterogeneous integration and advanced packaging. This enables implementation of complex, computation intensive AI algorithms for DoD AI and Autonomy applications. It will also facilitate use of integrated cyber-security methods/cryptography in the DoD hardware and utilization of the complex computational capability required for Active Electronically Scanned Array (AESA) Phase Array Radar System and Electronic Warfare (EW) and communications including 5G Radio access network (RAN) systems. The proposed large constellations of networked satellites will also require leading-edge semiconductor components to enable real time communication and on-satellite computation. The program prototypes will transition to military systems through strategic efforts based on collaboration with the DoD acquisition community, program offices, and the Defense Industrial Base.
Document Details
- Document Type
- Accomplishment
- Publication Date
- Oct 01, 2024
- Source ID
- 7de6d0048606cb1cd3150c63c16112a3