FLOW-GATING

Abstract

Work concerns transistor selection and evaluation, the basic design problem, and the evaluation of the flow-gating memory. The proposed system consists of 14 flow-gating flipflops, which constitute a 1/4 word (3 transistors per bit), the read-in driver (18/14 transistors per bit), the read-out driver (10/14 transistors per bit), and termination equipment (2/11 transistors per bit). The system uses five transistors per bit of which 12/14 are GF45011, 40/77 are N-101 and the remaining parts are of the N-100 type. The terminal properties are given. The AC behavior is discussed in considerable detail. The read-in speed, after tolerance correction, is less than 90 nsec.; the read-out speed is in the vicinity of 80 nsec., when referenced to the input of the respective drivers. This apparently satisfies the proposed requirement of 150 nsec. access times. (Author)

Document Details

Document Type
Technical Report
Publication Date
Mar 24, 1961
Accession Number
AD0256890

Entities

People

  • Henry Guckel
  • Ronald K. Crow
  • Toshiro Kunihiro

Organizations

  • University of Illinois Urbana–Champaign

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Access Time
  • Electronic Components
  • Electronic Equipment
  • Modules (Electronics)
  • Semiconductor Devices
  • Terminals
  • Test And Evaluation
  • Test Equipment
  • Transistors

Readers

  • Computer Engineering
  • Semiconductor Device Technology
  • Software Engineering