A DISCRETE COMPENSATOR FOR SAMPLED-DATA SYSTEMS USING MAGNETIC CORES AS STORAGE ELEMENTS

Abstract

The construction of a discrete compensator to be used in a sampled-data control system is described. The compensator employs a discrete delay line utilizing magnetic cores to store, in pulse-width-modulated form, the sampled values of the signal. This system requires no relays or stepping switches; everything is solid state except for the amplifiers used in the sample and hold circuits, demodulation integrators, and coefficient multiplication. This tapped delay line operates like a shift register. A group of toroidal cores with coils wound on them are connected in series. Each core is set to negative saturation; then a signal is impressed onto the first core in the chain for a certain peri d of time. Next, a reset signal is impressed onto this first core, and simultaneously a set signal of the same amplitude is impressed onto the second core. Thus the first step of the shifting i accomplished. This can be repeated as often as desired, depending only on how many cores are in the chain. (Author)

Document Details

Document Type
Technical Report
Publication Date
May 11, 1961
Accession Number
AD0264355

Entities

People

  • G.g. Lendaris

Organizations

  • University of California, Berkeley

Tags

DTIC Thesaurus Topics

  • Amplifiers
  • Amplitude
  • Circuits
  • Coefficients
  • Compensators
  • Construction
  • Control Systems
  • Delay Lines
  • Demodulation
  • Integrators
  • Magnetic Cores
  • Saturation
  • Shift Registers

Fields of Study

  • Physics

Readers

  • Computer Science/Computer Engineering/Data Science/Digital Signal Processing.
  • Control Systems Engineering.
  • Electrical Engineering