MICROMINIATURE LAYERED PRINTED WIRING.

Abstract

A technique for plating of copper in plated through holes less than .025 in. in diameter and more than two diameters deep has been developed. This technique consists of partial panel and partial pattern plating of the copper. Boards manufactured by this technique exhibited minimum plating buildup and minimum of undercut around the miniature plated through holes with a .002 in. rim around the periphery. Better con trol of plating currents has also been achieved. The final sequence of manufacturing processes required to produce microminiature layered printed wiring test pattern boards has been selected and all tooling has been manufactured. A new test pattern has been added for measuring dielectric withstanding voltage and insulation resistance between very closely spaced holes and conductors. (Author)

Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1963
Accession Number
AD0411568

Entities

People

  • G. Messner
  • M. Paluszek
  • R. Mccaw

Tags

Communities of Interest

  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Boundaries
  • Diameters
  • Insulation
  • Manufacturing
  • Mathematics
  • Resistance
  • Sequences

Fields of Study

  • Physics

Readers

  • Computer Science/Computer Engineering/Data Science/Digital Signal Processing.
  • Manufacturing Engineering.
  • Surface Engineering/Surface Coating Technology.

Technology Areas

  • Microelectronics
  • Microelectronics - Graphene
  • Space