A STATISTICAL TOLERANCE ANALYZER MODEL,
Abstract
This report is a presentation of the logic, circuits, printed-circuit board layouts and interconnections for a model of a statistical tolerance analyzer. The device analyzes a simple diode circuit. The probability density of V sub IN versus V sub IN and the probability density of v sub d (diode voltage) versus v sub d is known. The problem is to find the probability density of v sub out versus v sub out. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Nov 02, 1964
- Accession Number
- AD0463322
Entities
People
- Thomas E. Burnside
Organizations
- University of Illinois Urbana–Champaign