STUDY OF PIECE PART FAULT ISOLATION BY COMPUTER LOGIC. VOLUME 5. DESIGN OF FAULT ISOLATION TEST PROGRAM FOR FADAC CIRCUITS.
Abstract
The purpose of the subject contract was to develop fault isolation test procedures for FADAC circuit boards expressed in FATAL II compiler language. A number of these test procedures were completed. However, only one circuit was finished to the point where it was run through the compiler. The input and output of the compiler for this test procedure is contained in the appendix. One of the difficulties encountered in this project was the shortage of test points in certain FADAC circuit boards. This is pointed out in Table 1 which shows that the number of test points contained in these 31 circuit boards varies from a low of zero to a high of 49. Another difficulty has been the specification of component parameter values. The manufacturer's specifications although probably suitable for production acceptance testing for individual components are very often not appropriate for in-circuit fault isolation testing. Table 2 summarizes some of the work done over the past 5 years on fault isolation test procedures for 14 circuits of both the Vacuum Tube and Solid State types. The number of parameters in these circuits varied from 9 for the simplest circuit to 386 for the Logic Flip Flop circuit. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 30, 1964
- Accession Number
- AD0615337
Entities
People
- C. Beckman
- J. Adler
- R. S. Berkowitz
- S. D. Bedrosian
- Thomas Chen
Organizations
- University of Pennsylvania