PROCEDURE FOR THE DESIGN AND ANALYSIS OF ARBITRARY LENGTH DIGITAL COUNTERS.
Abstract
A step-by-step procedure is described for designing digital counters having complex, arbitrary sequences. A divide-by-ten up-down counter is then designed to illustrate use of truth tables, 'P' terms, Veitch diagrams, and 'don't care' terms for simplifying the gate functions used to trigger each counter stage. The value of this procedure in circuit analysis as well as for circuit synthesis is then emphasized and illustrated by example. This procedure makes use of fundamental Boolean algebra and minimization techniques. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- May 06, 1965
- Accession Number
- AD0616117
Entities
People
- H. G. Talmadge Jr.
- R. J. Orsino
Organizations
- United States Naval Research Laboratory