RESEARCH OF ION IMPLANTATION DOPING TECHNIQUES.
Abstract
Implementation was carried out on a resistor array consisting of 40 elements whose dimensions were 2 x 40 mils on a <110> oriented silicon substrate. The implantation conditions corresponded to values indicating optimum sheet resistance for the desired objective range, namely 1 to 5 kilohms per square. Resistor preparation: A <110> orientation, 20 ohm-cm p-type silicon slice was polish etched and thermally oxidized to form a 1-micron thick oxide layer. Windows were cut into the oxide through which phosphorous was diffused to form the contact pads. The diffusion layer was approximately 2 microns thick. Subsequently windows corresponding to the resistor array were cut. The n-type resistor layer was formed by K(+) ion implantation. An aluminum layer was evaporated, masked, and etched to form metal contacts on the diffused contact pads. Resistor evaluation: The reverse bias breakdown voltage between adjacent resistors was 150 volts at 1 microampere. Resistance vs temperature was measured on a selected number of gages. The distribution of resistance values on all the units which were in the direct beam was 5%.
Document Details
- Document Type
- Technical Report
- Publication Date
- Oct 01, 1965
- Accession Number
- AD0624545
Entities
People
- D. B. Medved
- L. Garasi