COMPUTER-AIDED ANALYSIS OF A SILICON MONOLITHIC INTEGRATED CURRENT SWITCH GATE.

Abstract

In the d.c. design of large signal non-saturating-type logic circuits, it has been possible to develop a set of worst case defining equations which take into account all external and internal parameter variations; such as resistor, voltage tolerances and certain transistor parameters. An example of how a computer solves the problem of specifying allowable noise immunity of a current switch gate (C.S.G.) under worst case static conditions is illustrated in this report. (Author)

Document Details

Document Type
Technical Report
Publication Date
Mar 01, 1966
Accession Number
AD0631657

Entities

People

  • Joseph E. Kernan Jr.
  • Paul H. Holub
  • William V. Bell

Organizations

  • United States Army Communications-Electronics Command

Tags

DTIC Thesaurus Topics

  • Circuits
  • Computers
  • Electronic Components
  • Electronic Equipment
  • Equations
  • Immunity
  • Logic
  • Logic Gates
  • Resistors
  • Transistors

Readers

  • Calculus or Mathematical Analysis
  • Integrated Circuit Design and Technology.