MOS INTEGRATED CIRCUITS.
Abstract
The reports contains the results on the process improvements to develop an integrated semiconductor memory utilizing complementary MOS transistors. Various factors which affect process control were investigated. An optimum structure for obtaining complementary regions of p-type and n-type silicon is given. Complementary pairs of normally-off n-channel and p-channel devices were obtained both on separate and on a single substrate material. The cleanliness during the process is an important factor which affects the reproducibility and the uniformity of the device characteristics. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 1966
- Accession Number
- AD0635190
Entities
People
- C. Roe
- H. Van Beek
- J. Tsai
- T. Sikina
Organizations
- Westinghouse Electric Corporation