MULTI-CORE MEMORY MODULE DC TESTER,
Abstract
The system described was designed to provide an automatic D.C. testing device for use with the multicore assemblies used in Satellite memory assemblies. Unitl now, these assemblies were tested by hand, a rather cumbersome task. Each assembly consists of from 3 to 160 cores, each with several windings, as well as several common windings which traverse the whole assembly of cores. It is very important that each core have an exact ratio of turns for proper operation, thus, for a D.C. test, the system must be extremely sensitive to small changes in resistance. This unit is designed to test all multicore assemblies by changing a programming panel for each different type. Although somewhat limited in its application, because of the reasons outlined in the summary, it does provide a sensitive resistance check of these assemblied. The report describes its operation as assembled presently. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 21, 1963
- Accession Number
- AD0650978
Entities
People
- C. Douglass Locke
Organizations
- Johns Hopkins University Applied Physics Laboratory