BRLESC I AND II MEMORY CROSSBAR SWITCH, A HIGH SPEED DIGITAL COMMUNICATION SYSTEM.
Abstract
The report describes the design and construction of a micro circuit high speed digital communication switching system to be used in a multi processor computer system. Included are applications to time sharing with memory protect features, and block transfer of information between processors and off line equipment. A detailed description of operation and logic is presented. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 01, 1967
- Accession Number
- AD0652682
Entities
People
- G. L. Herald
- G. R. Klair
Organizations
- Ballistic Research Laboratory