ON CONSTRUCTION OF SERIAL-PARALLEL DIGITAL-DIFFERENTIAL ANALYZER
Abstract
The digital differential analyzer proposed in the article contains only one integral, which assumes in succession during each integration step the role of all the necessary integrators; however, the information in the digital integrator is processed not sequentially, but in parallel code. Its advantages are claimed to be higher operating speed than possessed by the sequential- sequential differential analyzer, approaching the speed of the parallel- sequential operation (where there are many integrators as are required for the solution of the problem), but requiring much less equipment. The author discusses the possible block diagram of such an analyzer, the parallel-type digital integrator employed, the various individual circuit elements, and the scheme whereby the increments of the integrand are generated.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 09, 1967
- Accession Number
- AD0660418
Entities
People
- A. V. Kalyaev
- R. V. Korobkov
Organizations
- National Air and Space Intelligence Center