ONE METHOD FOR THE SYNTHESIS OF DECODERS WITH A SEPARATED LOAD,

Abstract

Standard decoding circuits with a separated load require a considerable code excess at the input, which leads to substantial expenditures for the devices. The present author examines the feasibility of constructing decoders on the basis of reduced codes which use 'determining' classes of the orthogonal code. The employment of this code in conjunction with the simultaneous use of summation of current and voltages makes it possible to save on the equipment and to simplify the manufacture of decoders. Designs of several decoders are studied as an example. An investigation is made of the effectiveness of a decoder which combines the functions of decoding and multiplication of matrices with the simultaneous use of the method of summation of current and voltage, as compared, for example, with a decoder designed according to the principle of voltage summation. It is found that the proposed combined method produces a design of a decoder more effective than known designs, since it requires less components. The effectiveness of the circuit rises with an increase in the number of decoder outputs.

Document Details

Document Type
Technical Report
Publication Date
Oct 13, 1967
Accession Number
AD0667748

Entities

People

  • F. N. Zykov

Organizations

  • National Air and Space Intelligence Center

Tags

DTIC Thesaurus Topics

  • Coding
  • Data Processing Equipment
  • Decoders
  • Decoding
  • Employment
  • Message Decoding
  • Notation
  • Processing Equipment
  • Standards

Fields of Study

  • Engineering

Readers

  • Computer Programming and Software Development.
  • Electrical Engineering
  • Life Cycle Cost Analysis