MEMORY DEVICE WITH EXTERNAL SELECTION (ZAPOMINAYUSHCHEE USTROISTVO S VNESHNIM VYBOROM),
Abstract
A highly reliable transistorized two-cores-per-bit file memory designed to operate in data processing control systems is described. It consists of: a ferrite-core stack serving as the accumulator store; two address registers; a sampling circuit; a circuit for generating sampling-current pulses; write drivers serving to shape powerful current pulses during data recording; an output signal amplifier; input and output registers; an overwriting circuit; and the operating-cycle control circuit. There are two cores per bit: a memory core and a switch core. The maximum switch time of any core does not exceed 4 msec. The memory device is powered from a 24 v source. The power requirement of the entire device is about 100 w.
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 13, 1967
- Accession Number
- AD0669300
Entities
People
- N. P. Vashkevich
- V. N. Sorokin
Organizations
- National Air and Space Intelligence Center