DECODER (DESHIFRATOR),
Abstract
The decoder operates on the basis of logical AND circuits and comprises input storage elements with direct and inverse outputs whose number is equal to that of pulse signals in the communication channel. It is also provided with output memory elements whose number is equal to that of permissible signal combinations, and whose inputs are connected through OR circuits to groups of logical AND circuits. The number of AND circuits is equal to that of input element combinations of delta + 1. The delta + 1 inputs of each AND circuit are connected to the zero inputs of the storage elements which are transferred from the state of 'unity' to that of 'zero' by the input signal, and to the unit inputs of the elements which change their state from 'zero' to 'unity.' Such an arrangement of the decoder provides a correction of delta and leads to the detection of the (delta + 1) error in the initial combination for a given number of single signals with similar pulse characteristics.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 28, 1967
- Accession Number
- AD0671744
Entities
People
- T. P. Belaya
Organizations
- National Air and Space Intelligence Center