AN ASSOCIATIVE PROCESSOR.
Abstract
A fully associative processor is proposed in this report. This processor may achieve all the relational, the logic, and the retrieval operations, which should be achieved by any associative system. Furthermore, a possibility of extending the capability of the associative processor to arithmetic operations is also suggested. The operation speeds (in terms of cycle time) for various searches and retrievals are discussed. The proposed system appears, in principle, to have the highest speed for achieving complex searches and for performing ordered retrievals as compared to any other associative system so far proposed. The system is also capable of achieving simple searches in one cycle time and resolving n simultaneous responses in n retrieval cycles. A 4x4 breadboard associative memory using multiaperture cores was constructed and tested. This memory has the noise compensation feature which would greatly increase the memory capacity. The propagation delay and attenuation effects were analyzed in relationship to noise compensation. The above associative memory may also include signal compensation which would provide the memory the ability to detect the neighboring codes of a specific code. Thus, the system reliability can be increased when redundant codes are used. A system of notation was developed so that the search specifications can be expressed in terms of logic equations. A simple language for the system is also suggested. Three magnetic memory devices are proposed. Some experiments were performed on the modified waffle-iron devices. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jan 01, 1969
- Accession Number
- AD0682353
Entities
People
- Tse-yun Feng
Organizations
- University of Michigan