A METHOD OF ACCELERATED DIGIT PROCESSING IN BINARY-TO-DECIMAL NUMBER-CONVERSION DEVICES,
Abstract
A method of accelerating digit processing in binary-to-decimal number converters is described. Increase in conversion rate is achieved by reducing the number of operations accomplished during one cycle of conversion. Usually a cycle consists of two operations: doubling (shift by one bit toward the high-order bits) and code conversion (addition and correction). The proposed method is based on the fact that code correction by digit inversion can be realized taking the subsequent doubling into account. A double code with an excess of 'Six' is formed as a result of such a correction. The value of the low-order digit in the tetrad is determined by the nature of the operation in the previous lower-order tetrad. The value of the digit is '0' with shift and '1' with conversion. During each operation the digits in the tetrad vary once, while the code acquires the values of decimal digits. It suffices to invert six digits for correcting the code in the tetrad. The described characteristics of the method result in the rule of multiplication of the tetrad by 2 in the decimal number system.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 11, 1968
- Accession Number
- AD0682972
Entities
People
- V. N. Zamrii
Organizations
- National Air and Space Intelligence Center