THREE-LEVEL LOGIC ELEMENTS ON FERRITE TRANSISTOR CELLS,
Abstract
A 3-level ferrite-transistor memory element was developed for storing, reading, and shaping a ternary code. This element was used as a basis for designing a ternary half-adder; the element can perform all three ternary-algebra operations: inversion, conjunction, and disjunction. Laboratory tests of the half-adder hookup proved that: (1) Single-channel links for ternary information transmission enhances the adder reliability; (2) All elements are loaded uniformly and with not more than two similar elements, which also enhances reliability; (3) Only one cycle is used for receiving addends and forming the sum; hence, no matching devices are needed for using the half-adder in an arithmetic unit; (4) All elements can be designed as identical modules.
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 27, 1968
- Accession Number
- AD0684643
Entities
People
- M. P. Troitskaya
Organizations
- National Air and Space Intelligence Center