GENERATION OF DIAGNOSTIC TESTS USING PRIME IMPLICANTS,

Abstract

With recent advances in microminiaturization and fabrication techniques, digital computer design has begun to make fuller use of single packages containing many logic gates. This change in design approach has shifted the emphasis in fault testing techniques. Fault Testing is defined here as the process of determining whether or not a package of gates is operating correctly by comparing its output under certain inputs with that of the fault-free machine. It is the purpose of this thesis to present an approach to fault testing using only the prime implicant information provided for the system. This technique is an answer to the question, 'How may fault tests for a given circuit be selected with the minimum of detailed analysis of the logic network.' The number of tests specified by this approach is, in general, much lower than the number of possible input combinations, although it may be higher than the minimum number of tests which could be derived with full, detailed knowledge of the circuit structure. (Author)

Document Details

Document Type
Technical Report
Publication Date
May 01, 1969
Accession Number
AD0688832

Entities

People

  • Michael Reid Paige

Organizations

  • University of Illinois Urbana–Champaign

Tags

DTIC Thesaurus Topics

  • Circuits
  • Computers
  • Demographic Cohorts
  • Digital Computers
  • Fabrication
  • Logic
  • Logic Gates
  • Microminiaturization
  • Networks

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Software Engineering