GRAPHICAL ANALYSIS AND SYNTHESIS OF COMPLEMENTARY MOS CIRCUITS.
Abstract
Graphical methods of analyzing and synthesizing complementary MOS circuits containing n devices, n = or > 2, are presented. The analysis is carried out by dividing the circuit into n-1 sub-circuits composed either of two devices or of a single device and the previous sub-circuit treated as a single device. The v-i curves of each successive sub-circuit are then graphically determined by overlaying v-i curves of its components until the v-i curves of the entire circuit are determined. The synthesis is carried out by reducing the electronic functions to be performed by a circuit to a set of properties of the v-i curves. The resulting v-i curves are compared with curves produced by known devices known devices and circuits to determine the proper devices and connections. Eleven new versatile complementary MOS circuits developed using these graphical methods are presented with their v-i and transfer curves. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 1969
- Accession Number
- AD0695480
Entities
People
- Dale R. Flournoy
Organizations
- Air Force Institute of Technology