AN INVESTIGATION INTO THE EXTENSION OF REDUNDANCY TECHNIQUES,

Abstract

A new redundancy technique termed Dotted Logic is presented. Critical input errors are eliminated by joining together the outputs of NAND gates and NOR gates. The remaining subcritical errors are corrected by introducing redundant inputs to each gate or module. Two different schemes, Dotted Alternating and Dotted Identical, are described and compared with existing error correcting techniques. It is shown that these new methods are more reliable and less expensive than Quadded or TMR networks. In addition to correcting single faults, Dotted schemes are easily extended to cover multiple faults. Methods for initial failure determinations for Dotted schemes are proposed. Finally, it is proven that any general function can be made more reliable by Dotting. In addition, rules are given for applying Quadded Logic to any of these general functions. (Author)

Document Details

Document Type
Technical Report
Publication Date
Feb 01, 1970
Accession Number
AD0700684

Entities

People

  • Harvey Allen Finkelstein

Organizations

  • University of Illinois Urbana–Champaign

Tags

DTIC Thesaurus Topics

  • Circuits
  • Electrical Circuits
  • Electrical Equipment
  • Electronic Circuits
  • Logic
  • Nand Gates
  • Networks
  • Redundancy

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Vision Science/Vision Psychology/Cognitive Neuroscience.