Parallel Implementation of Arithmetic Operations in Extension Fields.
Abstract
Parallel implementation of arithmetic operations in finite fields is usually limited to the binary field, i.e., the field of two integers. Serial implementation of arithmetic operations is accomplished through the use of shift registers. It would be highly desirable in many applications to be able to carry out arithmetic operations, in the extension field of a field of elements, in parallel. For instance, if error correcting codes are to be used in integrated circuit memory arrays, parallel decoding would be mandatory. Most of the encoding and decoding algorithms for error correcting codes are implemented in a serial fashion. Methods of implementing arithmetic operations in parallel, particularly multiplication and division are presented in this paper for any GF(q sup m), where q is a prime number and m is a positive integer. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jul 01, 1970
- Accession Number
- AD0714170
Entities
People
- George I. Davida
Organizations
- University of Iowa