Expansion and Compression Buffers for the Phase II DSCS TDMA. Design Plan. Exhibit II.

Abstract

The document contains logic circuit diagrams for the DSCS TDMA system including the following: Transmit data commutator; Receive data recommutator; Transmit data subchannel; Receive data subchannel; Memory expansion card; MOF steering logic, MOF control logic.

Document Details

Document Type
Technical Report
Publication Date
Feb 01, 1971
Accession Number
AD0728514

Entities

Organizations

  • International Business Machines Corporation (Armonk, NY)

Tags

DTIC Thesaurus Topics

  • Circuits
  • Commutators
  • Compression
  • Diagrams
  • Logic
  • Logic Gates
  • Steering
  • Wiring Diagrams

Readers

  • Computer Science/Computer Engineering/Data Science/Digital Signal Processing.
  • Solar Photovoltaics and Thermoelectric Devices.
  • Tactical Satellite Communications Systems Engineering.