Error-Control Techniques for Logic Processors.
Abstract
A new error-control technique for logic processors is given. The proposed technique uses Reed Muller Codes. The design scheme given has far better efficiency than the schemes proposed earlier. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jul 01, 1971
- Accession Number
- AD0729269
Entities
People
- Dhiraj K. Pradhan
- Sudhakar M. Reddy
Organizations
- University of Iowa