On the Design of Diagnosable Combinational Networks,
Abstract
A vector notation for the generation of fault detection tests from the functional description of a logic network is introduced. It is shown that it is possible to treat the fault behavior and diagnosis of the basic gate types (AND, OR, NAND, NOR) in a uniform manner and to extend this approach to two-level designs. The formulation of a design criterion to simplify the fault detection problem in multi-level logic networks is studied. The simplification sought is two-fold: The network should be a priori completely diagnosable, that is, all single and multiple faults can be detected; All the information pertaining to the diagnosis of the network can be obtained from the functional description of the element. It is shown that the criterion of network irredundancy satisfies the above requirements, while being a reasonable design tool. The use of a higher-level system design language for the specification of digital networks is examined. Some general properties which are desirable in such a system to enhance the diagnosability of the resulting design are discussed. A method for translating a design description into diagnosable hardware is presented. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Jul 01, 1971
- Accession Number
- AD0730117
Entities
People
- Michael Reid Paige
Organizations
- University of Illinois Urbana–Champaign