Software Simulation of an Associative Processor.
Abstract
A software simulation of an associative processor (AP) has been developed in Fortran as a tool for use in some research projects at NRL. The particular AP design being simulated is that described in NRL Report 7348, a design oriented towards the requirements of the Advanced Avionic Digital Computer (AADC) under development by the Naval Air Systems Command. The simulated AP is driven by a simulated associative processor controller (APC). The APC is a simple, sequential computer with an instruction memory, a data memory, an arithmetic and control section, and a set of special, AP associated registers. The entire AP/APC simulation is at the bit level with the exception of the APC instruction memory, which contains a nmemonic APC code written by the user. In this report the overall simulation is described and instructions for its use are given. A complete example is included. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 16, 1971
- Accession Number
- AD0736183
Entities
People
- John E. Shore
Organizations
- United States Naval Research Laboratory