Mutiple Virtual Segmentation on the PDP-10 Computer,

Abstract

Results are reported of a feasibility study on the incorporation of hardware into the PDP-10 computer to transform virtual-segment-address references into memory references. The report discusses justification for virtual-segment addressing, operating system implications, proposed virtual-address formats, functional properties of the proposed address-decoding hardware, required hardware and how it interfaces with existing hardware, and reltionship with other virtual memory designs. (Author)

Document Details

Document Type
Technical Report
Publication Date
Jul 30, 1971
Accession Number
AD0741634

Entities

People

  • Alvin S. Cooperband
  • Louis Gallenson

Organizations

  • University of California

Tags

DTIC Thesaurus Topics

  • Addressing
  • Coding
  • Computer Programs
  • Computer Vision
  • Computers
  • Decoding
  • Feasibility Studies
  • Message Decoding
  • Message Processing
  • Notation
  • Operating Systems

Fields of Study

  • Computer science

Readers

  • Computer Engineering
  • Computer Science/Computer Engineering/Data Science/Digital Signal Processing.
  • Computer Vision.