One Digit Decimal Adder,
Abstract
The authors analyze a method for construction of a combination adder to yield a savings of logic elements. The second stage of the adder, the sum correction section, is changed. If this method is applied to adders based on combination accumulating elements, an even greater saving of equipment is produced due to the presence of inverted variables. An example of construction of a decimal adder in 8421 code is presented. (Author)
Document Details
- Document Type
- Technical Report
- Publication Date
- Apr 03, 1972
- Accession Number
- AD0744170
Entities
People
- N. Ya. Kakurin
- Yu. A. Vansilenko
Organizations
- National Air and Space Intelligence Center