Comment on Simple Synthesis Method for Sequential Logical Circuits,

Abstract

The article is a supplement to the article of B. Burdyar (see arstr. C5629 of 1971). Some misprints of this article are corrected. Further possibilities of the minimization of logic functions are presented. Some fault phenomena occurring in asynchronous circuits are analysed. (Author)

Document Details

Document Type
Technical Report
Publication Date
Jun 12, 1972
Accession Number
AD0747383

Entities

People

  • Michal Servit

Organizations

  • National Air and Space Intelligence Center

Tags

DTIC Thesaurus Topics

  • Continents
  • Czechoslovakia
  • Eastern Europe
  • Eurasia
  • Europe

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Library and Information Science