Application of the Method of Boundary Investigations to the Design of Integrated Transistor-Transistor Logic Circuits,

Abstract

The obtained analytic expressions which connect the circuit characteristics with the component parameters make it possible to analyze a TTL integrated circuit and to calculate it by the method of boundary testing. The use of this method makes it possible to find the optimal resistor values ensuring a minimum signal propagation delay, and simultaneously guaranteeing circuit efficiency with a combination of the worst operating conditions and spread of the component parameters. The method of boundary testing may be used in circuit design with consideration of aging or margin of safety. The prospects in using this method to calculate semiconductor integrated circuits must be especially stressed, since parameter optimization is directly related to the percentage output of useful circuits. (Author)

Document Details

Document Type
Technical Report
Publication Date
May 26, 1972
Accession Number
AD0749604

Entities

People

  • G. G. Kazennov
  • G. G. Smolko
  • V. N. Strukov
  • Yu. O. Maksimov

Organizations

  • National Air and Space Intelligence Center

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Boundaries
  • Circuits
  • Integrated Circuits
  • Logic Gates
  • Margin Of Safety
  • Semiconductor Devices
  • Semiconductors
  • Transistor Transistor Logic
  • Transistors

Fields of Study

  • Engineering

Readers

  • Computational Modeling and Simulation
  • Integrated Circuit Design and Technology.
  • Systems Analysis and Design

Technology Areas

  • Microelectronics